Semiconductor Engineering sat down to discuss debugging complex SoCs with Randy Fish, vice president of strategic accounts and partnerships for UltraSoC; Larry Melling, product management director for ...

The semiconductor industry has spent decades mastering the art of integrated circuit physical verification. But as system-on-chip (SoC) designs push the boundaries of complexity—with more transistors, ...

The increasing reliance on complex multicore designs is driving the need for comprehensive debugging tools that can answer a variety of challenges. With multiple cores and support structures often ...

Debugging today’s advanced systems-on-chip (SoCs) is anything but simple. SoC verification environments require tests spanning billions of cycles (Fig. 1). 1. Many classes of bugs become visible only ...

In this paper, we present a behavior analysis technique for hardware debugging of complex System-on-Chip (SoC) designs. As designs get more and more complex, there is a need to analyze the design ...

Learn how using formal verification can take you beyond the limitations of directed-random simulation when debugging silicon. A series of case studies provide real-world usage examples of Jasper ...