EDN

Mentor Unveils High-Level Synthesis Tool

To automatically create high-performance multi-block subsystems from pure sequential ANSI C++, Wilsonville, Ore.-based Mentor Graphics Corp. today announced Catapult System Level (SL), that it ...
Electronic Design

Full-Chip High-Level Synthesis Tool Adds SystemC Support

High-level synthesis (HLS) continues to grow in favor among beleaguered system-on-a-chip (SoC) design teams. At the same time, EDA vendors continue to increase the capabilities of their tools. The ...
Electronic Design

High-Level Synthesis Drives Next-Gen Edge AI Accelerators

Insight into high-level synthesis (HLS). Advantages of using HLS with AI acceleration. All things in your life are getting smarter. From the vehicles that will move you around, to the house you live ...
EDN

The ‘why’ and ‘what’ of algorithmic synthesis

Algorithmic synthesis helps hardware designers build and verify hardware more efficiently, giving them better control over optimization of their design architecture. The starting point of this flow is ...
Semiconductor Engineering

Ensure Equivalence Of Synthesizable C++/SystemC Designs Against Generated/Handwritten RTL

High-level synthesis (HLS) is a design flow in which design intent is described at a higher level of abstraction than RTL, such as in SystemC/C++ or MATLAB. HLS tools are expected to synthesize this ...
Semiconductor Engineering

High-Level Synthesis Propels Next-Gen AI Accelerators

Everything around you is getting smarter. Artificial intelligence is not just a data center application but will be deployed in all kinds of embedded systems that we interact with daily. We expect to ...