Electronic Design

Vector Processor Makes Short Work Of Complex DSP Algorithms

With four vector pipelines, Telairity Semiconductor's TVP400 combines the signal-processing features of a high-performance DSP and the control capabilities of a 32-bit microcontroller (see the... With ...
Network World

Cray to unite scalar, vector computer architectures

Cray plans to create a new supercomputing platform combining four types of processing capability in a blade server architecture. Cray Inc. plans to create a new supercomputing platform combining four ...
Design-Reuse

CEVA Introduces MUST Multi-core System Technology, Adds Vector Floating-point Capabilities for CEVA-XC DSP Architecture Framework

Architecture framework further enriched with full support for ARM® AXI4 specification, AMBA 4 ACE cache coherency and a broad range of optimized tightly coupled extensions for wireless applications ...
New Electronics

Fractile licenses Andes Technology’s RISC-V Vector processor

Andes Technology, a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores, has announced a partnership with Fractile. Fractile is currently developing AI inference ...
The Next Platform

Can Vector Supercomputing Be Revived?

Seymour Cray loved vector supercomputers, and made the second part of that term a household word because of it. NEC, the last of the pure vector supercomputer makers, is so excited about its new ...
insideHPC

The Role of Middleware in Optimizing Vector Processing

A new whitepaper from NEC X delves into the world of unstructured data and explores how vector processors and their optimization software can help solve the challenges of wrangling the ever-growing ...
manilatimes

Fractile licenses Andes Technology's RISC-V vector processor as it builds radical new chip to accelerate AI inference

San Jose, CA, Oct. 22, 2024 (GLOBE NEWSWIRE) -- Andes Technology, a leading supplier of high-efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V International, ...
Design-Reuse

AICP: AURA Intelligent Co-processor for Binary Neural Networks

AURA (Advanced Uncertain Reasoning Architecture) is a generic family of techniques and implementations intended for high-speed approximate search and match operations on large unstructured datasets.
EDN

Embedded Systems Architecture, Device Drivers – Part 1: Interrupt Handling

Defining device drivers Discussing the difference between architecture-specific and board-specific drivers Providing several examples of different types of device drivers Most embedded hardware ...
insideHPC

Intel Xeon Phi Processor: A Look at the Basic Architecture

Innovation in the high performance computing world requires that new technology be created while maintaining compatibility with older applications. The Intel Xeon Phi processor is an example of ...
EDN

MCU to Intel architecture conversion

About 8.3 billion microprocessors were produced worldwide in 2009. However, microprocessors for information processing such as personal computers (PC) is about 0.15 billion (which is only 2% of the ...