EDN

Wafer-Level Packaging Reduces Cost, Spurs Recovery

With the industry recovery coming on slowly, cost is a more important factor than ever. Semiconductor manufacturers are constantly under pressure to reduce costs, and during a down cycle they must do ...
Nasdaq

ACM Research Highlights Availability of Portfolio of Wafer-Level Packaging Processing Equipment for OSAT Customers

Extensive Array of Back-End and Advanced Packaging Wet Wafer Process Equipment Leverages ACM’s Experience to Address Emerging Requirements for Wafer-Level Packaging FREMONT, Calif., Oct. 15, 2020 ...
Seeking Alpha

ACM Research Receives Orders for Wafer-Level Packaging Tools from U.S. Customer and R&D Center

FREMONT, Calif., Sept. 04, 2024 (GLOBE NEWSWIRE) -- ACM Research, Inc. (ACMR) (“ACM”) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level ...
Seeking Alpha

ACM Research Expands Advanced Packaging Portfolio with Introduction of Frame Wafer Cleaning Tool

FREMONT, Calif., May 08, 2024 (GLOBE NEWSWIRE) -- ACM Research, Inc. (ACMR) (“ACM”) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level ...
Digi Times

Samsung steps up fan-out wafer-level packaging deployment

Samsung Electronics has stepped up its deployment in the fan-out (FO) wafer-level packaging segment with plans to set up related production lines in Japan, according to industry sources. Samsung has ...
Nasdaq

Akoustis Locks Process Flow for First Wafer-Level-Chip-Scale Package (WLCSP) for XBAW Filters

Charlotte, N.C., Feb. 01, 2021 (GLOBE NEWSWIRE) -- Akoustis Technologies, Inc. (NASDAQ: AKTS) (“Akoustis” or the “Company”), an integrated device manufacturer (IDM) of patented bulk acoustic wave (BAW ...
EDN

STATS expands wafer-level packaging output

SAN JOSE, Calif. — Citing renewed demand, Singapore's STATS ChipPAC Ltd. is expanding its capacity for wafer-level packaging. STATS ChipPAC has been on a production ramp with wafer-level packaging ...
Electronic Design

Chip Packaging Part 6 - Wafer to Panel Level Packaging

Dr. Navid Asadi’s group takes a look at wafer to panel level chip packaging. This is the six of a mutlipart series on chip packaging technologies. Navid Asadi is an assistant professor in the ...
AOL

Nvidia Accelerates AI Chip Production with New Packaging Tech to Meet Soaring Demand

Nvidia Corp (NASDAQ:NVDA) plans to use Fan-Out Panel Level Packaging (FOPLP) technology for its GB200 AI server chips earlier than scheduled to address the production constraints of Chip on Wafer on ...
Digi Times

South Korea initiates major R&D project to boost chips packaging competitiveness

Recognizing the strategic importance of semiconductor packaging technology, the South Korean government is reportedly initiating a major packaging technology R&D project aimed at assisting companies ...
Business Insider

ClassOne Technology Expands Solstice® Single-Wafer Portfolio with New 300mm Solstice Max Platform for Advanced Packaging Metallization

PHOENIX, Oct. 07, 2025 (GLOBE NEWSWIRE) -- SEMICON WEST -- ClassOne Technology, a leading global provider of advanced electroplating and wet processing tools for microelectronics manufacturing, today ...