GitHub

VHDL UART transmitter/receiver for the Basys3 FPGA, verified in simulation and tested over serial communication with PuTTY.

This project implements a complete UART (Universal Asynchronous Receiver/Transmitter) system in VHDL and deploys it on a Basys3 FPGA board. The design supports serial communication between a PC and ...
GitHub

Simple UART for FPGA

Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to ...
IEEE

Low-Power UART Architecture with Integrated SECDED for Reliable Asynchronous Communication

Abstract: This paper presents a compact, low-power UART architecture integrated with Single Error Correction and Double Error Detection (SECDED) for reliable serial ...
IEEE

A Beam Tracking Algorithm for Terahertz Band On-Body Communication Using Inertial Measurement Units

Abstract: In Beyond 5G / 6G, high-speed and high-capacity uplink communication is required to realize Cyber Physical Systems (CPS). The authors propose a concept called virtual terminals (VTs), which ...