design an 8 to l multiplexer using a minimum number of combination of 2 to l multiplexer and 4 to i multiplexeruse d0d1d2 and up to d7 as the input data linesuse y as the output line and use 90215

EET 3100Lab 4MUX OperationImplement the following logic function with an 8x1 MUX. Apply the variable A, C, and Dto the selection lines. Also implement the same logic function using discrete logicgates. Compare the output waveforms.The two circuits should be created in the same schematic file using the same inputs.The two sets of outputs from the two circuits should be shown in the same waveformand simulated simultaneously.F (A, B, C, D) = (A B D')(C A)(B D)

How to Design Logic Circuits & Logic Gates

Digital Logic Design

Digital Logic Design: A Complete Guide